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Put two chips, runtimes, or runtime versions side by side. Everything else is held fixed or called out, so a ratio is worth exactly what the matched runs say.

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Runs compared: 8
Like-for-like pair: 1
Chips available: 8

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Side A

Side B

Model

Runtime

Runtime version

Quantisation

Backend

Prefill size

Decode size

Cooldown

5 runs vs 3 runs · 1 like-for-like pair

Held fixedModel: Qwen3.8 27BPrefill: PP512Decode: TG128

The sides differ in decode workload. Ratios may reflect benchmark protocol rather than the chip.

Chip comparison

Apple M5 Max vs Apple M1 Max

Ratios read side A relative to side B. Geometric mean over 1 like-for-like pair.

Decode: 1.95×+95.0%
Prefill: 7.24×+624%

Side A

Apple M5 Max

5 runs

2 contributors

Latest 15 Sep 2026

Decode · TG128: 21.5tok/s median
best 34.0 · worst 19.7
Prefill · PP512: 590tok/s median
best 599 · worst 589

Models: Qwen3.8-27B
Runtimes: BaseRT
Versions: BaseRT 0.2.4
Quantisations: Q4
Backends: Metal
Cooldown: off
Conditioning: warmup_only
Decode workload: TG128
Harness schema: basert-benchmark-harness/1

Side B

Apple M1 Max

3 runs

1 contributor

Latest 19 Sep 2026

Decode · TG128: 11.0tok/s median
best 18.2 · worst 11.0
Prefill · PP512: 82tok/s median
best 82 · worst 82

Models: Qwen3.8-27B-Q4, Qwen3.8-27B-Q8
Runtimes: BaseRT
Versions: BaseRT 0.2.6
Quantisations: Q4
Backends: Metal
Cooldown: off
Conditioning: warmup_only
Decode workload: TG128 @ 1 ctx
Harness schema: basert-benchmark-harness/1

What differs besides the chip

Facet	Apple M5 Max	Apple M1 Max
Model	Qwen3.8-27B	Qwen3.8-27B-Q4, Qwen3.8-27B-Q8
Runtime version	BaseRT 0.2.4	BaseRT 0.2.6
Decode workload	TG128	TG128 @ 1 ctx

Like-for-like pairs

Each row is a configuration present on both sides. Values are per-cell medians; ratios read Apple M5 Max relative to Apple M1 Max.

Configuration	Decode A	Decode B	Ratio	Prefill A	Prefill B	Ratio	Runs A / B
Qwen3.8-27B BaseRTQ4	21.5	11.0	1.95×	590	82	7.24×	5 / 3

Side A · Apple M5 Max

Top 5 of 5 runs by decode throughput.

Model / format	Chip / backend	Decode	Prefill	Contributor	Date	Report
basecompute/Qwen3.8-27B BaseRT 0.2.4Q4	Apple M5 Max Metal	34.0 TG128	589 PP512	basecompute	10 Sep 2026	View Benchmark
basecompute/Qwen3.8-27B BaseRT 0.2.4Q4	Apple M5 Max Metal	21.5 TG128	590 PP512	lukas	15 Sep 2026	View Benchmark
basecompute/Qwen3.8-27B BaseRT 0.2.4Q4	Apple M5 Max Metal	21.5 TG128	594 PP512	lukas	15 Sep 2026	View Benchmark
basecompute/Qwen3.8-27B BaseRT 0.2.4Q4	Apple M5 Max Metal	20.7 TG128	599 PP512	lukas	15 Sep 2026	View Benchmark
basecompute/Qwen3.8-27B BaseRT 0.2.4Q4	Apple M5 Max Metal	19.7 TG128	589 PP512	lukas	10 Sep 2026	View Benchmark

Side B · Apple M1 Max

Top 3 of 3 runs by decode throughput.

Model / format	Chip / backend	Decode	Prefill	Contributor	Date	Report
Qwen3.8-27B-Q4 BaseRT 0.2.6Q4	Apple M1 Max Metal	18.2 TG128 @ 1 ctx	82 PP512	basecompute	19 Sep 2026	View Benchmark
Qwen3.8-27B-Q8 BaseRT 0.2.6Q4	Apple M1 Max Metal	11.0 TG128 @ 1 ctx	82 PP512	basecompute	19 Sep 2026	View Benchmark
Qwen3.8-27B-Q8 BaseRT 0.2.6Q4	Apple M1 Max Metal	11.0 TG128 @ 1 ctx	82 PP512	basecompute	19 Sep 2026	View Benchmark