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Put two chips, runtimes, or runtime versions side by side. Everything else is held fixed or called out, so a ratio is worth exactly what the matched runs say.
Ratios read side A relative to side B. Geometric mean over 1 like-for-like pair.
| Facet | NVIDIA GB10 | Apple M1 Max |
|---|---|---|
| Model | Qwen3.5-2B-cuda-q4mix, Qwen3.5-2B-cuda-q8, Qwen3.5-2B-Q4 | Qwen3.5-2B-Q4, Qwen3.5-2B-Q8 |
| Quantisation | Q4 | Q4, Q8 |
| Backend | CUDA | Metal |
Each row is a configuration present on both sides. Values are per-cell medians; ratios read NVIDIA GB10 relative to Apple M1 Max.
| Configuration | Decode A | Decode B | Ratio | Prefill A | Prefill B | Ratio | Runs A / B |
|---|---|---|---|---|---|---|---|
Qwen3.5-2B BaseRTQ4 | 151.5 | 192.9 | 0.79× | 6,754 | 429 | 15.73× | 3 / 1 |
Top 3 of 3 runs by decode throughput.
| Model / format | Chip / backend | Decode | Prefill | Contributor | Date | Report |
|---|---|---|---|---|---|---|
Qwen3.5-2B-Q4 BaseRT 0.2.6Q4 | NVIDIA GB10 CUDA | 181.6 TG128 @ 1 ctx | 4,185 PP512 | basecompute | View Benchmark | |
Qwen3.5-2B-cuda-q4mix BaseRT 0.2.6Q4 | NVIDIA GB10 CUDA | 151.5 TG128 @ 1 ctx | 6,837 PP512 | basecompute | View Benchmark | |
Qwen3.5-2B-cuda-q8 BaseRT 0.2.6Q4 | NVIDIA GB10 CUDA | 113.5 TG128 @ 1 ctx | 6,754 PP512 | basecompute | View Benchmark |
Top 2 of 2 runs by decode throughput.
| Model / format | Chip / backend | Decode | Prefill | Contributor | Date | Report |
|---|---|---|---|---|---|---|
Qwen3.5-2B-Q4 BaseRT 0.2.6Q4 | Apple M1 Max Metal | 192.9 TG128 @ 1 ctx | 429 PP512 | basecompute | View Benchmark | |
Qwen3.5-2B-Q8 BaseRT 0.2.6Q8 | Apple M1 Max Metal | 141.5 TG128 @ 1 ctx | 400 PP512 | basecompute | View Benchmark |