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Put two chips, runtimes, or runtime versions side by side. Everything else is held fixed or called out, so a ratio is worth exactly what the matched runs say.
Ratios read side A relative to side B. Geometric mean over 1 like-for-like pair.
| Facet | Apple M5 Pro | NVIDIA GB10 |
|---|---|---|
| Model | Qwen3-30B-A3B-Instruct-2507 | Qwen3-30B-A3B-Instruct-2507-cuda-q4mix, Qwen3-30B-A3B-Instruct-2507-cuda-q8, Qwen3-30B-A3B-Instruct-2507-Q4 |
| Runtime | BaseRT, llama.cpp | BaseRT |
| Runtime version | BaseRT 0.2.4, llama.cpp b10809 (5266f24da) | BaseRT 0.2.6, BaseRT 0.3.0 |
| Quantisation | Q2_K, Q3_K_M, Q4, Q4_K_M, Q5_K_M, Q6_K | Q4 |
| Backend | BLAS + Metal, Metal | CUDA |
| Conditioning | runtime_native_warmup, warmup_only | warmup_only |
| Decode workload | TG128 | TG128 @ 1 ctx |
| Harness schema | basert-benchmark-harness/1, computearena-measurements/1 | basert-benchmark-harness/1 |
Each row is a configuration present on both sides. Values are per-cell medians; ratios read Apple M5 Pro relative to NVIDIA GB10.
| Configuration | Decode A | Decode B | Ratio | Prefill A | Prefill B | Ratio | Runs A / B |
|---|---|---|---|---|---|---|---|
Qwen3-30B-A3B-Instruct-2507-cuda-q4mix BaseRTQ4 | 98.1 | 80.7 | 1.21× | 3,493 | 7,315 | 0.48× | 2 / 5 |
Top 8 of 8 runs by decode throughput.
| Model / format | Chip / backend | Decode | Prefill | Contributor | Date | Report |
|---|---|---|---|---|---|---|
basecompute/Qwen3-30B-A3B-Instruct-2507 BaseRT 0.2.4Q4 | Apple M5 Pro Metal | 104.0 TG128 | 3,680 PP512 | arki05 | View Benchmark | |
Qwen3-30B-A3B-Instruct-2507 llama.cpp b10809 (5266f24da)Q2_K | Apple M5 Pro BLAS + Metal | 102.7 TG128 | 1,893 PP512 | arki05 | View Benchmark | |
Qwen3-30B-A3B-Instruct-2507 llama.cpp b10809 (5266f24da)Q3_K_M | Apple M5 Pro BLAS + Metal | 97.3 TG128 | 1,708 PP512 | arki05 | View Benchmark | |
Qwen3-30B-A3B-Instruct-2507 llama.cpp b10809 (5266f24da)Q4_K_M | Apple M5 Pro BLAS + Metal | 95.2 TG128 | 1,845 PP512 | arki05 | View Benchmark | |
Qwen3-30B-A3B-Instruct-2507 llama.cpp b10809 (5266f24da)Q4_K_M | Apple M5 Pro BLAS + Metal | 95.0 TG128 | 1,831 PP512 | arki05 | View Benchmark | |
basecompute/Qwen3-30B-A3B-Instruct-2507 BaseRT 0.2.4Q4 | Apple M5 Pro Metal | 92.2 TG128 | 3,305 PP512 | arki05 | View Benchmark | |
Qwen3-30B-A3B-Instruct-2507 llama.cpp b10809 (5266f24da)Q5_K_M | Apple M5 Pro BLAS + Metal | 84.7 TG128 | 1,644 PP512 | arki05 | View Benchmark | |
Qwen3-30B-A3B-Instruct-2507 llama.cpp b10809 (5266f24da)Q6_K | Apple M5 Pro BLAS + Metal | 78.9 TG128 | 1,646 PP512 | arki05 | View Benchmark |
Top 5 of 5 runs by decode throughput.
| Model / format | Chip / backend | Decode | Prefill | Contributor | Date | Report |
|---|---|---|---|---|---|---|
Qwen3-30B-A3B-Instruct-2507-cuda-q4mix BaseRT 0.3.0Q4 | NVIDIA GB10 CUDA | 99.1 TG128 @ 1 ctx | 7,437 PP512 | basecompute | View Benchmark | |
Qwen3-30B-A3B-Instruct-2507-cuda-q4mix BaseRT 0.2.6Q4 | NVIDIA GB10 CUDA | 99.0 TG128 @ 1 ctx | 7,439 PP512 | basecompute | View Benchmark | |
Qwen3-30B-A3B-Instruct-2507-Q4 BaseRT 0.2.6Q4 | NVIDIA GB10 CUDA | 80.7 TG128 @ 1 ctx | 4,715 PP512 | basecompute | View Benchmark | |
Qwen3-30B-A3B-Instruct-2507-cuda-q8 BaseRT 0.2.6Q4 | NVIDIA GB10 CUDA | 61.2 TG128 @ 1 ctx | 7,253 PP512 | basecompute | View Benchmark | |
Qwen3-30B-A3B-Instruct-2507-cuda-q8 BaseRT 0.2.6Q4 | NVIDIA GB10 CUDA | 49.4 TG128 @ 1 ctx | 7,315 PP512 | basecompute | View Benchmark |