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Put two chips, runtimes, or runtime versions side by side. Everything else is held fixed or called out, so a ratio is worth exactly what the matched runs say.
Ratios read side A relative to side B. Geometric mean over 2 like-for-like pairs.
Everything else matches: model, quantisation, backend, protocol, and workload are the same on both sides.
Each row is a configuration present on both sides. Values are per-cell medians; ratios read Apple M1 Max relative to Apple M3 Ultra.
| Configuration | Decode A | Decode B | Ratio | Prefill A | Prefill B | Ratio | Runs A / B |
|---|---|---|---|---|---|---|---|
Qwen3-1.7B BaseRTQ4 | 220.0 | 311.1 | 0.71× | 2,237 | 5,586 | 0.40× | 2 / 2 |
Qwen3-1.7B BaseRTQ8 | 153.7 | 242.7 | 0.63× | 2,217 | 5,682 | 0.39× | 2 / 2 |
Top 4 of 4 runs by decode throughput.
| Model / format | Chip / backend | Decode | Prefill | Contributor | Date | Report |
|---|---|---|---|---|---|---|
Qwen3-1.7B-Q4 BaseRT 0.3.0Q4 | Apple M1 Max Metal | 220.2 TG128 @ 1 ctx | 2,230 PP512 | basecompute | View Benchmark | |
Qwen3-1.7B-Q4 BaseRT 0.2.6Q4 | Apple M1 Max Metal | 219.7 TG128 @ 1 ctx | 2,244 PP512 | basecompute | View Benchmark | |
Qwen3-1.7B-Q8 BaseRT 0.2.6Q8 | Apple M1 Max Metal | 153.9 TG128 @ 1 ctx | 2,223 PP512 | basecompute | View Benchmark | |
Qwen3-1.7B-Q8 BaseRT 0.3.0Q8 | Apple M1 Max Metal | 153.6 TG128 @ 1 ctx | 2,210 PP512 | basecompute | View Benchmark |
Top 4 of 4 runs by decode throughput.
| Model / format | Chip / backend | Decode | Prefill | Contributor | Date | Report |
|---|---|---|---|---|---|---|
Qwen3-1.7B-Q4 BaseRT 0.3.0Q4 | Apple M3 Ultra Metal | 314.9 TG128 @ 1 ctx | 5,751 PP512 | basecompute | View Benchmark | |
Qwen3-1.7B-Q4 BaseRT 0.2.6Q4 | Apple M3 Ultra Metal | 307.4 TG128 @ 1 ctx | 5,420 PP512 | basecompute | View Benchmark | |
Qwen3-1.7B-Q8 BaseRT 0.3.0Q8 | Apple M3 Ultra Metal | 246.8 TG128 @ 1 ctx | 5,666 PP512 | basecompute | View Benchmark | |
Qwen3-1.7B-Q8 BaseRT 0.2.6Q8 | Apple M3 Ultra Metal | 238.6 TG128 @ 1 ctx | 5,698 PP512 | basecompute | View Benchmark |